nestedsvm: reduce TLB flushes

Reduce TLB flushes:
1. When we update the cr3 during VMRUN/VMEXIT emulation
    we toggle between n1asid and n2asid forth and back
    => no TLB flush needed
2. Only flush n1asid or n2asid depending on vcpu guest mode
    and not both unconditionally.

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
Signed-off-by: Keir Fraser <keir@xen.org>

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index b34289781260206c0a756d5d7840a79f86288d96..8b1557b8ca4755a2d25bef71515c87109043ae93 100644 (file)
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -451,7 +451,14 @@ static void svm_update_guest_cr(struct vcpu *v, unsigned int cr)
         break;
     case 3:
         vmcb_set_cr3(vmcb, v->arch.hvm_vcpu.hw_cr[3]);
-        hvm_asid_flush_vcpu(v);
+        if ( !nestedhvm_enabled(v->domain) )
+            hvm_asid_flush_vcpu(v);
+        else if ( nestedhvm_vmswitch_in_progress(v) )
+            ; /* We toggle between n1asid/n2asid -> no flush required. */
+        else
+            hvm_asid_flush_vcpu_asid(
+                nestedhvm_vcpu_in_guestmode(v)
+                ? &vcpu_nestedhvm(v).nv_n2asid : &v->arch.hvm_vcpu.n1asid);
         break;
     case 4:
         value = HVM_CR4_HOST_MASK;